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Effects of Memory Sharing on Contemporary Processor Architectures

Publication at Faculty of Mathematics and Physics |
2007

Abstract

Memory subsystems of contemporary processor architectures are typically equipped with a multitude of caches, which make the behavior of the memory subsystem difficult to anticipate especially when the subsystem is shared by multiple running applications. The paper presents early experimental results that dispel some preconceived notions about the memory subsystem, with applications in system design and performance engineering.